---
title: "Samsung Introduces 8LPU+: Non-EUV 8nm Process Promises +12% Performance and -15% Power Efficiency"
description: "Samsung has announced the enhanced 8nm 8LPU+ process based on DUV lithography: leaks point to +12% performance and -15% power reduction. The platform targets automotive MCUs, industrial robotics, and edge AI."
date: 2026-10-28T18:40:49.765Z
lang: en
url: https://xab.info/en/posts/samsung-introduces-8lpu-plus-8nm-duv
tags: [samsung, semiconductor, 8nm, duv-lithography, finfet, automotive-mcu, chip-fabrication]
author: "Alexander Buran"
publisher: "XAB.info"
---

# Samsung Introduces 8LPU+: Non-EUV 8nm Process Promises +12% Performance and -15% Power Efficiency

![Micrograph of a silicon die from a Samsung semiconductor processor showing visible transistor structures and markings](https://xab.info/media/2026/10/28/samsung-8lpu-8-nm-techprocess-duv/samsung-8lpu-8-nm-techprocess-duv-1.webp)

## Key Points

- Samsung introduced an upgraded version of its 8nm 8LPU+ process that does not require EUV scanners
- According to leaks, 8LPU+ delivers +12% performance, -15% power consumption, and -8% logic area
- The platform utilizes DUV immersion lithography and targets automotive MCUs, ZCUs, industrial robots, and edge AI
- 8LPU+ integrates 3.3V planar I/Os, ULL-SRAM, cHVT transistors, and eMRAM memory

Samsung, having mastered manufacturing processes down to 2nm in recent years, is not abandoning its older 8nm node, which requires no expensive EUV scanners. The baseline variant—8LPU—was introduced back in 2017 and has remained in market demand ever since. Recently, the South Korean manufacturer announced an improved version of the platform, 8LPU+, which according to leaks will deliver up to a 12% performance boost, a 15% reduction in power consumption, and up to an 8% decrease in logic die area compared to the original 8LPU. Samsung intends to fully unveil the technology platform before the end of 2026.

### DUV Instead of EUV: Hardware Cost Savings

The key distinction of 8LPU+ from Samsung’s modern 5nm, 4nm, and 2nm processes lies in its use of deep ultraviolet (DUV) immersion lithography to pattern critical layers. This allows the company to bypass purchasing extremely expensive EUV scanners, significantly cutting capital expenditures for production. Years of experience manufacturing 8nm chips gives Samsung a highly precise understanding of die yields and cost structures, simplifying financial planning and pricing for customers.

### Target Segment: Reliability and Cost Take Priority Over Peak Speed

The new platform targets customers who prioritize low cost, high reliability, and long-term component availability over maximum performance. Expected application areas for 8LPU+ include automotive microcontrollers (MCUs), zonal control units (ZCUs), industrial robots, and edge artificial intelligence systems. In these segments, extreme lithography scaling requirements take a back seat to stability, thermal resilience, and extended support lifecycles.

### Technical Features: eMRAM, ULL-SRAM, and 3.3V I/Os

8LPU+ features the integration of 3.3V planar input/output devices directly into the FinFET process, reducing the area of corresponding circuits by approximately 10%. To lower standby power consumption, ultra-low-leakage SRAM (ULL-SRAM) and high threshold voltage (cHVT) transistors are utilized. Special attention goes to the embedded magnetoresistive memory (eMRAM), which is traditionally in demand for automotive electronics due to its low sensitivity to ambient temperatures and high endurance of write cycles.

### Exynos 9820 Die as a Reference

The illustration published by ChipRebel shows a fragment of the Exynos 9820 chip die manufactured by Samsung Foundry using the 8nm process. The image clearly displays characteristic rows of transistor structures, test pads, and marking elements, including the serial code "S5 E98 20A01". This die visually demonstrates the density and architecture of the logic blocks that will be optimized in the 8LPU+ version to reduce area and energy costs.

### Caveats Regarding Figures

It should be noted that the specific figures—12% performance, 15% power reduction, and 8% area reduction—stem from leaks and have not yet been officially confirmed by Samsung in a press release. Furthermore, the industry typically improves one parameter while keeping another stable during a node transition, making simultaneous gains across all three directions less common. Final specifications will be revealed upon the platform's official launch, which, according to available reports, is scheduled for late 2026.

## Fact-Check & Sources

- [Samsung прокачала 8-нм техпроцесс — 8LPU+ даст +12 % к скорости чипов и -15 % к потреблению window-new](https://3dnews.ru/1150472/samsung-prokachala-8nm-tehprotsess-8lpu-dast-12-k-skorosti-chipov-i-15-k-potrebleniyu) - Primary source. The fact of the 8LPU+ announcement is confirmed; specific metrics (12/15/8%) are cited as leak data. The Exynos 9820 die image is courtesy of ChipRebel.

## FAQ

### How does 8LPU+ differ from the baseline 8LPU?

According to leaks, 8LPU+ provides up to a 12% performance boost, a 15% decrease in power consumption, and up to an 8% reduction in logic area compared to 8LPU. It also integrates 3.3V planar I/Os, ULL-SRAM, cHVT transistors, and eMRAM memory.

### Why doesn't Samsung use EUV for 8LPU+?

8LPU+ is designed for DUV immersion lithography, avoiding the capital costs of extremely expensive EUV scanners. This makes the process cost-effective for customers who prioritize unit cost and reliability over maximum performance.

### What applications is the 8LPU+ platform intended for?

Target areas include automotive microcontrollers (MCUs), zonal control units (ZCUs), industrial robots, and edge artificial intelligence systems.

### When will Samsung officially unveil 8LPU+?

According to South Korean sources, a full presentation of the technology platform is scheduled for late 2026.