Latest data on Apple's flagship A20 Pro chip reveals a subtle but telling shift in the mobile SoC race: memory performance is now determined less by the generation of the standard than by the quality of the controller design. According to available measurements, the A20 Pro on TSMC's 2-nm process delivers a memory bandwidth of 115.2 GB/s, while Xiaomi's XRING 03 chip, which uses the newer LPDDR6 generation, is limited to 113.8 GB/s. In other words, Apple squeezes more out of the "proven" LPDDR5X than its competitor does out of the latest standard.

Bandwidth: LPDDR5X vs. LPDDR6

Both chips are built on a 96-bit memory bus, but they operate at different signal speeds: the A20 Pro uses LPDDR5X modules at 9,600 MT/s, while the XRING 03 uses LPDDR6 at 10,667 MT/s. Despite Xiaomi's higher memory clock speed, Apple ends up with the higher overall bandwidth. This indicates that the raw speed of the modules is neither the only nor the main factor: what matters most is how the memory controller organizes the flow of operations.

Six-Channel Architecture as the Key to Superiority

The A20 Pro's advantage is believed to be linked to a six-channel memory configuration. Such a scheme allows the controller to handle read and write operations simultaneously more efficiently, reducing latency and increasing effective bandwidth. As of publication, there is no official data confirming such a configuration for the A20 Pro, although a similar scheme has previously appeared in leaks, which makes this assumption plausible but unconfirmed.

Neural Compute and New Packaging

The changes in the A20 Pro are clearly tailored for local AI workloads. The chip features a dual Neural Engine with 16 cores in each block — 32 cores in total — as well as a 7-core GPU. Estimates suggest that the overall SoC performance has increased by roughly 20% compared to its predecessor. The packaging has presumably moved to a WMCM scheme, in which the DRAM is placed next to the die; this should help control heat during heavy neural-network computations.

Why Apple Kept LPDDR5X

The decision not to move to LPDDR6 is likely a deliberate economic choice. Against the backdrop of the costly transition to TSMC's 2-nm process, the company apparently chose not to further inflate production costs with a new generation of memory, relying instead on mature and inexpensive LPDDR5X combined with an optimized controller.

Contradictory Data

Some of the A20 Pro's specifications — the 2-nm process, the 32-core Neural Engine, the 7-core GPU, and the new packaging with memory next to the die — are corroborated by several independent sources. However, the six-channel memory configuration that explains the bandwidth advantage has not been officially confirmed by Apple and rests on leaks. Therefore, conclusions about the cause of the memory performance gap should be treated as a well-founded hypothesis rather than an established fact.